1. Field of the Invention
The present invention relates to an electrical connecting method.
2. Description of the Related Art
In a test of an electronic part having numerous fine terminals, such as an LSI wafer, an LSI chip, a chip-size package (CSP), or a semiconductor device, contact members (testing contact members) connected to an electric circuit included in a testing equipment are electrically connected to the terminals of the electronic part. Voltage is applied or current is fed to the terminals of the electronic part via the testing contact members whereby the electronic part is tested.
Moreover, contact members connected to the electric circuit are electrically connected to terminals of an electronic part such as a semiconductor device having an information storage/preservation facility, whereby information is written in the electronic part or read therefrom.
For connecting the terminal of an electronic part to the terminal of a circuit board, a mechanical/electrical connecting method through soldering has been adopted as a stable connecting means in the past.
However, as the connection through soldering is a permanent connection, the solder must be removed for separation.
Therefore, the connecting method through soldering is hardly adapted to temporary connection that is performed in a case where, after an electronic part is tested or information is written in or read from the electronic part, the contact members are separated from the terminals of the electronic part.
Therefore, in the test of an electronic part or writing or reading of information, a pressing connection, via a socket that is a temporary connection, is generally performed.
In this case, contacts members in the socket are merely physically and mechanically thrust onto the terminals of an electronic part, so electrical conductance depends on the state of the interface between a contact member and a terminal.
Specifically, the possibility that there is a high resistance film between a contact member and a terminal which are touching each other is very high because the surfaces of the contact member and/or the terminal may be coated with an oxide or a contaminant. Moreover, the surfaces of the contact member and the terminal have microscopic irregularities. Electrical connecting is achieved through the contact between the microscopic convex parts (projections) of the surfaces. Therefore, the substantial area of the contacting portion of the surfaces are so small as to cause a high constriction resistance.
The film resistance and the constriction resistance substantially dominate the contact resistance occurring at the time of the temporary connection achieved through pressing.
Conventionally, a method is adopted in which a contact pressure is increased in order to break the film on the surface of a terminal and/or the surface of a contact member for the purpose of minimizing the adverse effect of the film resistance; and the area of the contacting portion of the surfaces are increased in order to reduce the constriction resistance occurring on the interface between the contact member and the terminal.
Japanese Unexamined Patent Publication No. 11-133075 discloses an electric characteristic measuring equipment in which two contact probes contact one electrode pad.
According to the above related art, one of the contact probes is fixed to a ground potential, and voltage is applied to the other contact probe. The contact resistance occurring between the electrode pad and contact probe is then measured. If the contact resistance does not assume a proper value, electric characteristic measurement is suspended. If the contact resistance assumes a proper value, the electric characteristic measurement is continued.
Japanese Unexamined Patent Publication No. 7-012892 discloses a semiconductor device inspection method in which an insulating film is layered on a testing circuit board and is provided with a pocket that encloses electrodes formed on the testing circuit board.
The terminals of a semiconductor device are formed with solder bumps. The solder bumps are inserted into the pocket of the testing circuit board while being heated and fused. The terminals of the semiconductor device are plastically deformed in line with the shape of the pocket while contacting the electrodes on the testing circuit board. Consequently, stable electrical connection is achieved with a small pressing force.
However, in the foregoing contacting method, the solder bumps are fused and bonded to the electrodes on the circuit board. It is therefore hard to separate the solder bumps from the electrodes.
Japanese Unexamined Patent Publication No. 11-023656 discloses an IC inspection method that requires a semiconductor device, a testing board having electrode pads formed on the top thereof in the same pattern as the terminals of the semiconductor device, and having probe contacting electrode pads formed on the bottom thereof, and a testing equipment having testing probes.
The electrode pads on the testing board are smaller than the terminals of the semiconductor device, and protrude from the surface of the testing board so as to contact the terminals of the semiconductor device.
However, even in the foregoing contacting method, a large pressing force is needed in order to reduce a film resistance and a constriction resistance.
Japanese Unexamined Patent Publication No. 11-097497 discloses a semiconductor inspection jig that has an opening in association with solder balls formed on a semiconductor device, and has two contact members fixed to be opposed to each other within the opening. The solder balls are inserted into the openings of the semiconductor inspection jig and thus each solder ball contacts two contacts.
According to the foregoing related art, the contact members contact the solder balls over relative large area while being unaffected by a difference between the heights of the solder balls. Each of the contact members pushes away an oxide or dust present on the surface of each of the solder balls, whereby a film resistance is lowered. As the surface of the contact member moves on the surface of the terminal, the area of the actual contacting portion of the surfaces increases to decrease a constriction resistance. Consequently, an electric contact resistance is reduced.
However, in the foregoing related art, a contact pressure ranging from 0.2 N to 0.3 N must be imposed on each terminal.
In order to prevent environmental contamination, the material to be made into terminal is changing from a solder containing lead (Pb) to a solder devoid of lead (a lead-free solder).
Terminals to be made of the lead-free solder exhibit a high hardness. In order to achieve a stable electrical contact according to the related art, when the terminals are formed with solder balls whose diameters are 0.3 mm or more, a contact pressure ranging from 0.3 N to 0.4 N must be imposed on each terminal.
Consequently, for a low resistance between each of the terminals of an LSI chip made of a lead-free solder and each of the contact members in a socket included in the inspection equipment, and for a stable electrical contact of the terminals and contact members, assuming that the number of terminals on the LSI chip is about 1000, a total pressure ranging from 300 N to 400 N or more must be applied.
On the other hand, the LSI chip is provided in the form of a so-called chip-size package (CSP) whose outer dimension including that of a sealing member is close to that of the LSI chip. This is intended to enable high-density mounting of the LSI chip in the electronic equipment. Moreover, a semiconductor substrate used to form the LSI chip is made thinner. Thus, there is a trend toward a more compact design.
A ball grid array (BGA) or a land grid array (LGA) is being adopted as a structure for external connection terminals of a container or package enclosing an LSI chip or of a substrate supporting the LSI chip. Along with the tendency toward high-density integration or sophistication of an LSI chip, a larger number of external connection terminals (or pins) is requested. A semiconductor device having 1000 or more external connection terminals has made its debut.
On the other hand, as a means for high-density mounting, a method of layering a plurality of LSI chips on one another or layering LSI chips with a supporting substrate between adjoining ones has come to be adopted.
Such a structure having LSI chips mounted thereon highly densely has little durability to an extraneous force. When a large pressure like the aforementioned one is applied, there is a fear that the LSI chips may be cracked.
Consequently, a force to be imposed on an electronic part for the purpose of connecting the terminals of the electronic part to contact members must be minimized.
Moreover, when a contact pressure is increased so that a larger force will be imposed on an electronic part, it becomes necessary to improve the strength of a socket and that of a testing board. This invites an increase in a cost.